The HT70xxA-1 series devices area set of three terminal low power voltage detectors implemented in CMOS technology. Each voltage detector in the series detects a particular fixed voltage ranging from 2.2V to 5.0V. The voltage detectors consist of a high-precision and low power consumption standard voltage source as well as a comparator, hysteresis circuit, and an output driver. CMOS technology ensures low power consumption.
Although designed primarily as fixed voltage detectors, these devices can be used with external components to detect user specified threshold voltages.
Wide operating voltage range:
2.0V ~ 5.5V @system clock ≦8MHz.
2.2V ~ 5.5V @system clock >8MHz.
Wide operating temperature: -40°C ~ 85°C.
512 x 14 bits EPROM.
32 bytes SRAM.
6 general purpose I/O pins (GPIO), PB[5:0], with independent direction control.
PB[3:0] have features of Pull-Low resistor for input pin.
PB[5:0] have features of Pull-High resistor for input pin.
PB[5:4] and PB[2:0] have features of open-drain output.
PB[3] have feature of input or open-drain output.
4 level hardware Stack.
Direct and indirect addressing modes for data access.
One 8-bit up-count timer (Timer0) with programmable prescaler.
Built-in Power-On Reset (POR).
Built-in Low-Voltage Reset (LVR).
Built-in Watch-Dog Timer (WDT) enabled/disabled by firmware control.
Dual-clock oscillation: System clock can switch between high oscillation and low oscillation.
High oscillation: I_HRC (Internal High Resistor/Capacitor Oscillator ranging from 1M~20MHz)
Low oscillation: I_LRC (Internal 32KHz oscillator)
Four kinds of operation mode to reduce system power consumption:
Normal mode, Slow mode, Standby mode and Halt mode.
Three hardware interrupt events:
Timer0 overflow interrupt.
PB input change interrupt.
External interrupt.
Three interrupt events to wake-up NY8A050D from Standby mode:
Timer0 overflow interrupt.
PB input change interrupt.
External interrupt.
Two interrupt events to wake-up NY8A050D from Halt mode:
PB input change interrupt.
External interrupt.
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